Compare Word Instruction

cmp4

Operation Font Conventions

Instruction Type A

Format

(qp) cmp4.crel.ctype p1, p2 = r2, r3 register_form

(qp) cmp4.crel.ctype p1, p2 = imm8, r3 imm8_form

(qp) cmp4.crel.ctype p1, p2 = r0, r3 parallel_inequality_form

(qp) cmp4.crel.ctype p1, p2 = r3, r0 pseudo-op

Description

The least significant 32 bits from each of two source operands are compared for one of ten relations specified by crel. This produces a boolean result which is 1 if the comparison condition is true, and 0 otherwise. This result is written to the two predicate register destinations, p1 and p2. The way the result is written to the destinations is determined by the compare type specified by ctype, and as described for the Compare (cmp) instruction.

In the register_form the first operand is GR (general registers) r2; in the imm8_form the first operand is taken from the sign extended imm8 encoding field; and in the parallel_inequality_form the first operand must be GR 0.

The parallel_inequality_form is only used when the compare type is one of the parallel types, and the relation is an inequality (>, >=, <, <=), as described in the Compare (cmp) instruction and the 64-bit Comparison Relations for parallel type compares table.

If the two predicate register destinations are the same (p1 and p2 specify the same predicate register), the instruction will take an Illegal Operation fault, if the qualifying predicate is set, or if the compare type (ctype) is unc.

Of the ten relations, not all are directly implemented in hardware. Some are actually pseudo-ops. The implemented relations and how the pseudo-ops map onto them are shown in 64-bit Comparison Relations for Normal and UNC Type Compares, and 64-bit Comparison Relations for parallel type compares.

Compare Word Instruction

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