Fetch and Add Immediate InstructionFetch and Add Immediate Instructionfetchadd
Instruction Type M
Format
(qp) fetchadd4.sem.ldhint r1 = [r3], inc3 four_byte_form
(qp) fetchadd8.sem.ldhint r1 = [r3], inc3 eight_byte_form
Description
A value consisting of four or eight bytes is read from memory starting at the address specified by the value in GR r3. The value is zero extended and added to the sign-extended immediate value specified by inc3. The values that may be specified by inc3 are: -16, -8, -4, -1, 1, 4, 8, 16. The least significant four or eight bytes of the sum are then written to memory starting at the address specified by the value in GR r3. The zero-extended value read from memory is placed in GR r1 and the NaT bit corresponding to GR r1 is cleared.
The sem completer specifies the type of semaphore operation.
The memory read and write are guaranteed to be atomic for accesses to cacheable, writeback memory types. For accesses to other memory types, atomicity is platform dependent.
If the address specified by the value in GR r3 is not naturally aligned to the size of the value being accessed in memory, an Unaligned Data Reference fault is taken independent of the state of the User Mask alignment checking bit, UM.ac (PSR.ac in the Processor Status Register).
Both read and write access privileges for the referenced page are required. The write access privilege check is performed whether or not the memory write is performed.
Only accesses to UCE pages or cacheable pages with write-back write policy are permitted. Accesses to NaTPages result in a Data NaT Page Consumption fault. Accesses to pages with other memory attributes cause a Unsupported Data Reference fault.
On a processor model that supports exported fetchadd, a fetchadd to a UCE page causes the fetch-and-add operation to be exported outside of the processor; if the platform does not support exported fetchadd, the operation is undefined. On a processor model that does not support exported fetchadd, a fetchadd to a UCE page causes a Unsupported Data Reference fault.
The value of the ldhint completer specifies the locality of the memory access. Locality hints do not affect program functionality and may be ignored by the implementation.
addp - Add Pointer Instruction
andcm - And Complement Instruction
fadd - Floating-point Add Instruction
fma - Floating-point Multiply Add Instruction
fpma - Floating-point Parallel Multiply Add Instruction
fpnma - Floating-point Parallel Negative Multiply Add Instruction
Integer Multiply and Add (in FP Unit) Instructions
lfetch - Line Prefetch Instruction
mov gr - Move General Register Instruction
mov imm - Move Immediate Instruction
padd - Parallel Add Instruction
psad1 - Parallel Sum of Absolute Difference Instruction
pshladd - Parallel Shift Left and Add Instruction
pshradd - Parallel Shift Right and Add Instruction
shladd - Shift Left and Add Instruction