ld Operation Font Conventions
if (PR[qp]) {
size = fill_form ? 8 : sz;

speculative = (ldtype == ‘s' || ldtype == ‘sa');
advanced = (ldtype == ‘a' || ldtype == ‘sa');
check_clear = (ldtype == ‘c.clr' || ldtype == ‘c.clr.acq');
check_no_clear = (ldtype == ‘c.nc');
check = check_clear || check_no_clear;
acquire = (ldtype == ‘acq' || ldtype == ‘c.clr.acq');
bias = (ldtype == ‘bias') ? BIAS : 0 ;

itype = READ;
if (speculative) itype |= SPEC ;
if (advanced) itype |= ADVANCE ;

if ((reg_base_update_form || imm_base_update_form) && (r1 == r3))
illegal_operation_fault();
check_target_register
;
if (reg_base_update_form || imm_base_update_form)
check_target_register(r3);

if (reg_base_update_form) {
tmp_r2 = GR[r2];
tmp_r2nat = GR[r2].nat;
}

if (!speculative && GR[r3].nat) // fault on NaT address
register_nat_consumption_fault(itype);
defer = speculative && (GR[r3].nat || PSR.ed);// defer exception if spec

if (check && alat_cmp(GENERAL, r1)) { // no load on ld.c & ALAT hit
if (check_clear) // remove entry on ld.c.clr or ld.c.clr.acq
alat_inval_single_entry
(GENERAL, r1);
} else {
if (!defer) {
paddr = tlb_translate(GR[r3], size, itype, PSR.cpl, &mattr,
&defer);
if (!defer) {
otype = acquire ? ACQUIRE : UNORDERED;
val = mem_read(paddr, size, UM.be, mattr, otype, bias | ldhint);
}
}
if (check_clear || advanced) // remove any old ALAT entry
alat_inval_single_entry(GENERAL, r1);
if (defer) {
if (speculative) {
GR[r1] = natd_gr_read(paddr, size, UM.be, mattr, otype,
bias | ldhint);
GR[r1].nat = 1;
} else {
GR[r1] = 0; // ld.a to sequential memory
GR[r1].nat = 0;
}
} else { // execute load normally
if (fill_form) { // fill NaT on ld8.fill
bit_pos = GR[r3]{8:3};
GR[r1] = val;
GR[r1].nat = AR[UNAT]{bit_pos};
} else { // clear NaT on other types
GR[r1] = zero_ext(val, size * 8);
GR[r1].nat = 0;
}
if ((check_no_clear || advanced) && ma_is_speculative(mattr))
// add entry to ALAT
alat_write
(GENERAL, r1, paddr, size);
}
}

if (imm_base_update_form) { // update base register
GR[r3] = GR[r3] + sign_ext(imm9, 9);
GR[r3].nat = GR[r3].nat;
} else if (reg_base_update_form) {
GR[r3] = GR[r3] + tmp_r2;
GR[r3].nat = GR[r3].nat || tmp_r2nat;
}

if ((reg_base_update_form || imm_base_update_form) && !GR[r3].nat)
mem_implicit_prefetch
(GR[r3], ldhint | bias, itype);
}