Total Instruction Fetches

This event indicates all instruction fetches, including uncacheable fetches that bypass the Instruction Fetch Unit. An instruction fetch miss is counted only once and not once for every cycle it is outstanding.

See Also Additional Instructions Events:

Instruction TLB Misses

Instructions Decoded

Instructions Retired

Saturated Arithmetic Instructions Executed

Saturated Arithmetic Instructions Retired

Total Instruction Fetch Misses