Flush Write Buffers Instruction

fwb

Format

(qp)fwb M24

Description

The processor is instructed to expedite flushing of any pending stores held in write or coalescing buffers. Since this operation is a hint, the processor may or may not take any action and actually flush any outstanding stores. The processor gives no indication when flushing of any prior stores is completed. An fwb instruction does not ensure ordering of stores, since later stores may be flushed before prior stores.

To ensure prior coalesced stores are made visible before later stores, software must issue a release operation between stores.

This instruction can be used to help ensure stores held in write or coalescing buffers are not delayed

for long periods or to expedite high priority stores out of the processors.

Operation

if (PR[qp]) {

mem_flush_pending_stores();

}