Itanium(R) processor topicShift Right Instruction

shr

Operation Font Conventions

Instruction Type I

Format

(qp) shr r1 = r3, r2 signed_form

(qp) shr.u r1 = r3, r2 unsigned_form

(qp) shr r1 = r3, count6 pseudo-op of: (qp) extr r1 = r3, count6, 64–count6

(qp) shr.u r1 = r3, count6 pseudo-op of: (qp) extr.u r1 = r3, count6, 64–count6


Description

The value in GR r3 is shifted to the right and placed in GR r1. In the signed_form the vacated bit positions are filled with bit 63 of GR r3; in the unsigned_form the vacated bit positions are filled with zeroes. The number of bit positions to shift is specified by the value in GR r2 or by an immediate value count6. The shift count is interpreted as an unsigned number. If the value in GR r2 is greater than 63, then the result is all zeroes (for the unsigned_form, or if bit 63 of GR r3 was 0) or all ones (for the signed_form if bit 63 of GR r3 was 1).

If the .u completer is specified, the shift is unsigned (logical), otherwise it is signed (arithmetic).

For the immediate forms, see the extract (extr) instruction.


Related Topics:

Bit Field and Shift Instructions

ldfp - Floating-point Load Pair Instruction

Parallel Shift Instructions

pmpyshr - Parallel Multiply and Shift Right Instruction

pshl - Parallel Shift Left Instruction

pshladd - Parallel Shift Left and Add Instruction

pshr - Parallel Shift Right Instruction

pshradd - Parallel Shift Right and Add Instruction

shl - Shift Left Instruction

shladd - Shift Left and Add Instruction

shladdp - Shift Left and Add Pointer Instruction

shrp - Shift Right Pair Instruction