Itanium(R) processor topicShift Right Pair Instruction

shrp

Operation Font Conventions

Instruction Type M

Format

(qp) shrp r1 = r2, r3, count6


Description

The two source operands, GR r2 and GR r3, are concatenated to form a 128-bit value and shifted to the right count6 bits. The least-significant 64 bits of the result are placed in GR r1.

The immediate value count6 can be any number in the range 0 to 63.

Click to see an example of how the shift right pair instruction works.


Related Topics:

Bit Field and Shift Instructions

ldfp - Floating-point Load Pair Instruction

Parallel Shift Instructions

pmpyshr - Parallel Multiply and Shift Right Instruction

pshl - Parallel Shift Left Instruction

pshladd - Parallel Shift Left and Add Instruction

pshr - Parallel Shift Right Instruction

pshradd - Parallel Shift Right and Add Instruction

shl - Shift Left Instruction

shladd - Shift Left and Add Instruction

shladdp - Shift Left and Add Pointer Instruction

shr - Shift Right Instruction