Intel XScale(R) technology topicSTRB - Store Register Byte

Syntax

STR[condition]B op1, addr_mode

where:

 condition

One of 16 conditions. Refer to Condition Code Status.

 op1

register containing source

 addr_mode

Addressing Mode 2: Load and Store Word or Unsigned Byte

Description

The STRB instruction takes a byte of data from the LSB of op1 and stores it to an address specified by addr_mode . It also enables PC-relative addressing if used as a base register. The condition needs to be a valid value; else the instruction is rendered an NOP.

Note

A data abort exception is generated if an invalid load or store data access is attempted.

Addressing Mode

Mode 2 - Load and Store Word or Unsigned Byte.

Flags Affected 

N

Z

C

V

Q

S

I

F

T

T

T

T

T

 

 

 

 

 

Encoding

31

 

28

27

26

25

24

23

22

21

20

19

 

16

15

 

12

11

 

0

condition

0

1

I

P

U

1

W

0

basereg

op1

addr_mode

Example

1             ;@.text
2             ;@.globl funstr
3             ;@.align 0
4             ;@ **** STRB (Addressing Mode 2) ****
5             ;
6                    AREA example,CODE,READONLY
7
8                    label1
9             ; Store least byte from R8 to an address 28 bytes
10            ; above that held in R10
11   00000000   E5CA801C   STRB   R8, [R10,#28]
12
13            ; Store least byte from R1 to address held in R4
14            ; then increment R4 by an offset given by
15            ; R2 rotated right 8 times
16   00000004   E6C41462   STRB   R1, [R4], R2,ROR #8
17
18            ; Store least byte from R0 to address held in R3
19   00000008   E5C30000   STRB   R0, [R3]
 

Further Information

See Addressing Mode 2: Load and Store Word or Unsigned Byte